Core Boot for AMD Epyc: The Promising BIOS Alternative Nears Completion

BIOS alternative core boot for AMD Epyc is getting closer

A hurdle on the way to open-source UEFI BIOS alternatives such as Coreboot is the firmware code that is required to initialize central system components. With the “Open-Source x86 Silicon Initialization Library” (openSIL), AMD wants to facilitate the development of open-source mainboard firmware as an alternative or supplement to the UEFI BIOS.

AMD has now provided a first version of openSIL at GitHub and there is already a core boot firmware that uses it. However, the latter only runs on an AMD reference platform for current server processors of the AMD Epyc 9004 “Genoa” generation called Onyx Customer Reference Board (Onyx CRB) that is not publicly documented and available. AMD development partners use such CRBs as a kind of template for their own products.

Although the openSIL source code is open, it does not in itself lead to completely open-source mainboard firmware. Proprietary binary code is required to boot most computers in order to correctly configure the CPU, memory controller and PCI Express root complex, for example.

An example of such a Binary Large Object (BLOB) is the code that the memory controller needs to control memory modules (memory training). The electrical parameters of the high-frequency digital signals between the memory controller and SDRAM chips are optimized for stable and reliable communication.

With current AMD processors, tasks such as memory training are controlled by the so-called Platform Security Processor (PSP) based on an ARM core of the Cortex-A5 type, which, among other things, also runs the firmware TPM (fTPM 2.0) as an AMD Secure Processor. It also guards the cryptographic keys for RAM encryption (Memory Encryption/AMD Secure Encrypted Virtualization/SEV) and, as a system management unit (SMU), assumes power management functions.

Proprietary firmware is used for this purpose, which was previously included in the package for the AMD Generic Encapsulated Software Architecture (AGESA). This is also shown by reverse engineering the PSP. In other words, even on AMD platforms with Coreboot firmware, the AMD PSP continues to run proprietary code. Since this is indispensable for core functions, you cannot omit it.

Intel packs firmware BLOBs into so-called Firmware Support Packages (FSP).

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